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"author": "Micha\u0142 Kruszewski",
"author_email": "mkru@protonmail.com",
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"Intended Audience :: End Users/Desktop",
"License :: OSI Approved :: MIT License",
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
"Topic :: Software Development :: Quality Assurance",
"Topic :: Software Development :: Testing",
"Topic :: Utilities"
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"description": "# fsva - FuseSoc Verification Automation\n\n## Status\nThe project is considered as finished.\nOnly following changes will be accepted:\n- new tools support,\n- bug fixes,\n- minor improvements not breaking backward compatibility.\n\n## Introduction\n\nFuseSoc Verification Automation (fsva) is a tool that aims to automate the verification process of libraries and HDL design projects managed with [FuseSoc](https://github.com/olofk/fusesoc) build tool/system.\n\nFsva in no way duplicates or replaces functionalities provided by the FuseSoc.\nColloquially speaking, fsva is a wrapper for FuseSoc, automating the verification process.\nIt simply detects and runs verification targets, and parses verification results.\n\n### Why?\nThe major goal is to easily integrate project/libraries described in FuseSoc into Continuous Integration workflow.\nFuseSoc is more than good for building and running single targets, however if you want to run multiple verificaiton targets it keeps rebuilding verification frameworks.\nThis particular operation is redundant and time consuming.\nFsva assumes that verification frameworks (such as [UVVM](https://github.com/UVVM/UVVM) or [OSVVM](https://github.com/OSVVM/OSVVM)) are already pre-compiled (pre-analyzed) for simulation engines.\nWhat is more, fsva extends FuseSoc by parsing verification results.\n\n## How it works\nFsva scans recursively for `.core` files and fetches all targets with name `tb` or name starting with `tb_` or ending with `_tb`.\nThen it runs these targets calling FuseSoc run command and captures stdout and stderr.\nBy default verification targets are run in parallel.\nThe default number of concurrent processes equals `multiprocessing.cpu_count()`.\nAll verification results, as well as verification summary, are saved as separate files in a directory, which name reflects the UTC time of a verification process startup.\nUnder the UTC time directory, the cores directories are located.\nEach core directory contains directories with results for particular verification targets.\nExample `_fsva` output directory structure:\n```\n_fsva/\n\u2514\u2500\u2500 2020-07-15_16-31-47\n \u251c\u2500\u2500 div_by_3\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 div_by_3_tb\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 output.txt\n \u251c\u2500\u2500 gbt_link_checker\n \u2502\u00a0\u00a0 \u251c\u2500\u2500 checker_tb\n \u2502\u00a0\u00a0 \u2502\u00a0\u00a0 \u2514\u2500\u2500 output.txt\n \u2502\u00a0\u00a0 \u251c\u2500\u2500 generator_1_tb\n \u2502\u00a0\u00a0 \u2502\u00a0\u00a0 \u2514\u2500\u2500 output.txt\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 generator_2_tb\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 output.txt\n \u251c\u2500\u2500 psl\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 tb_0\n \u2502\u00a0\u00a0 \u251c\u2500\u2500 ghdl.ghw\n \u2502\u00a0\u00a0 \u251c\u2500\u2500 ghdl_psl_report.json\n \u2502\u00a0\u00a0 \u2514\u2500\u2500 output.txt\n \u2514\u2500\u2500 summary\n```\n\nFsva does not, and never will, perform any advanced results parsing such as scoreboard analysis or UVM coverage analysis.\nFsva does one thing, and tries to do it well.\n\nIf one needs advanced results parsing (for example in case of metric driven verification), then the proper parser needs to be run after fsva has finished.\nTo make the discovery of reuslts for such test benches easier, one can use special form of prefix or suffix indicating verification framework, infrastructure etc.\nFor instance, for UVVM one can use `tb_uvvm_` / `_uvvm_tb`, respectively for OSVVM one can use `tb_osvvm_` / `_osvvm_tb`.\n\nIf FuseSoc supports formal verification targets in the future, they will be fetched based on `fv_` prefix or `_fv` suffix.\n\n## Installation\nLatest stable version of fsva can be installed from [PyPI](https://pypi.org/project/fsva/):\n`pip install --user fsva`.\n\nAlternatively, you can clone this repository and run `python setup.py install --user`.\n## Usage\n\n### Verify project\nExecute `fsva` in project root directory to run all verification targets.\n\n![](\"/img/project.gif?raw=true\"/)
\n\n### Verify single core or target\nYou can also run all verification targets for single core:\n`fsva core_name`\nor run specific verification target for specific core\n`fsva core_name target_name`.\nWhen verifying single core or target, the output is printed on the console.\nExtra files, such as waveform, PSL reports etc. are placed under `_fsva/tmp/{core}/{target}/` path.\n\n![](\"/img/single_target.gif?raw=true\"/)
\n\n## Note!\nIf you use it with UVVM you may need to fix status that is returned when UVVM test bench fails: [Integrating UVVM with Continuous Integration - problem with simulators exit status](https://github.com/UVVM/UVVM/issues/82).\n\nMIT License\n\nCopyright (c) 2019 Micha\u0142 Kruszewski\n\nPermission is hereby granted, free of charge, to any person obtaining a copy\nof this software and associated documentation files (the \"Software\"), to deal\nin the Software without restriction, including without limitation the rights\nto use, copy, modify, merge, publish, distribute, sublicense, and/or sell\ncopies of the Software, and to permit persons to whom the Software is\nfurnished to do so, subject to the following conditions:\n\nThe above copyright notice and this permission notice shall be included in all\ncopies or substantial portions of the Software.\n\nTHE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\nIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\nFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\nAUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\nLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\nOUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\nSOFTWARE.",
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