
/* #########################################################################
 * [2015-11-30 12:17:28.472000] THIS FILE IS AUTOGENERATED - DO NOT EDIT!
 * ######################################################################### */

/* Automatically generated nanopb header */
/* Generated by nanopb-0.3.2 at Mon Nov 30 12:17:28 2015. */

#ifndef PB__TEENSY_MINIMAL_RPC__ADC_PB_H_INCLUDED
#define PB__TEENSY_MINIMAL_RPC__ADC_PB_H_INCLUDED
#include <pb.h>

#if PB_PROTO_HEADER_VERSION != 30
#error Regenerate this file with the current version of nanopb generator.
#endif

#ifdef __cplusplus
extern "C" {
#endif

/* Enum definitions */
typedef enum _teensy__3_1_adc_R_CFG1_E_ADIV {
    teensy__3_1_adc_R_CFG1_E_ADIV_ONE = 0,
    teensy__3_1_adc_R_CFG1_E_ADIV_TWO = 1,
    teensy__3_1_adc_R_CFG1_E_ADIV_FOUR = 2,
    teensy__3_1_adc_R_CFG1_E_ADIV_EIGHT = 3
} teensy__3_1_adc_R_CFG1_E_ADIV;

typedef enum _teensy__3_1_adc_R_CFG1_E_ADLSMP {
    teensy__3_1_adc_R_CFG1_E_ADLSMP_SHORT = 0,
    teensy__3_1_adc_R_CFG1_E_ADLSMP_LONG = 1
} teensy__3_1_adc_R_CFG1_E_ADLSMP;

typedef enum _teensy__3_1_adc_R_CFG1_E_MODE {
    teensy__3_1_adc_R_CFG1_E_MODE__8_BIT = 0,
    teensy__3_1_adc_R_CFG1_E_MODE__12_BIT = 1,
    teensy__3_1_adc_R_CFG1_E_MODE__10_BIT = 2,
    teensy__3_1_adc_R_CFG1_E_MODE__16_BIT = 3
} teensy__3_1_adc_R_CFG1_E_MODE;

typedef enum _teensy__3_1_adc_R_CFG1_E_ADICLK {
    teensy__3_1_adc_R_CFG1_E_ADICLK_BUS_CLOCK = 0,
    teensy__3_1_adc_R_CFG1_E_ADICLK_BUS_CLOCK_DIV_2 = 1,
    teensy__3_1_adc_R_CFG1_E_ADICLK_ALTERNATE_CLOCK = 2,
    teensy__3_1_adc_R_CFG1_E_ADICLK_ASYNCHRONOUS_CLOCK = 3
} teensy__3_1_adc_R_CFG1_E_ADICLK;

typedef enum _teensy__3_1_adc_R_CFG2_E_MUXSEL {
    teensy__3_1_adc_R_CFG2_E_MUXSEL_A = 0,
    teensy__3_1_adc_R_CFG2_E_MUXSEL_B = 1
} teensy__3_1_adc_R_CFG2_E_MUXSEL;

typedef enum _teensy__3_1_adc_R_CFG2_E_ADLSTS {
    teensy__3_1_adc_R_CFG2_E_ADLSTS_ADD_20_ADCK_CYCLES = 0,
    teensy__3_1_adc_R_CFG2_E_ADLSTS_ADD_12_ADCK_CYCLES = 1,
    teensy__3_1_adc_R_CFG2_E_ADLSTS_ADD_6_ADCK_CYCLES = 2,
    teensy__3_1_adc_R_CFG2_E_ADLSTS_ADD_2_ADCK_CYCLES = 3
} teensy__3_1_adc_R_CFG2_E_ADLSTS;

typedef enum _teensy__3_1_adc_R_SC2_E_ADTRG {
    teensy__3_1_adc_R_SC2_E_ADTRG_SOFTWARE = 0,
    teensy__3_1_adc_R_SC2_E_ADTRG_HARDWARE = 1
} teensy__3_1_adc_R_SC2_E_ADTRG;

typedef enum _teensy__3_1_adc_R_SC2_E_REFSEL {
    teensy__3_1_adc_R_SC2_E_REFSEL_DEFAULT = 0,
    teensy__3_1_adc_R_SC2_E_REFSEL_ALTERNATE = 1
} teensy__3_1_adc_R_SC2_E_REFSEL;

typedef enum _teensy__3_1_adc_R_SC3_E_AVGS {
    teensy__3_1_adc_R_SC3_E_AVGS__4 = 0,
    teensy__3_1_adc_R_SC3_E_AVGS__8 = 1,
    teensy__3_1_adc_R_SC3_E_AVGS__16 = 2,
    teensy__3_1_adc_R_SC3_E_AVGS__32 = 3
} teensy__3_1_adc_R_SC3_E_AVGS;

typedef enum _teensy__3_1_adc_R_PGA_E_PGAG {
    teensy__3_1_adc_R_PGA_E_PGAG__1 = 0,
    teensy__3_1_adc_R_PGA_E_PGAG__2 = 1,
    teensy__3_1_adc_R_PGA_E_PGAG__4 = 2,
    teensy__3_1_adc_R_PGA_E_PGAG__8 = 3,
    teensy__3_1_adc_R_PGA_E_PGAG__16 = 4,
    teensy__3_1_adc_R_PGA_E_PGAG__32 = 5,
    teensy__3_1_adc_R_PGA_E_PGAG__64 = 6
} teensy__3_1_adc_R_PGA_E_PGAG;

/* Struct definitions */
typedef struct _teensy__3_1_adc_R_CFG1 {
    bool has_ADLPC;
    bool ADLPC;
    bool has_ADIV;
    teensy__3_1_adc_R_CFG1_E_ADIV ADIV;
    bool has_ADLSMP;
    teensy__3_1_adc_R_CFG1_E_ADLSMP ADLSMP;
    bool has_MODE;
    teensy__3_1_adc_R_CFG1_E_MODE MODE;
    bool has_ADICLK;
    teensy__3_1_adc_R_CFG1_E_ADICLK ADICLK;
} teensy__3_1_adc_R_CFG1;

typedef struct _teensy__3_1_adc_R_CFG2 {
    bool has_MUXSEL;
    teensy__3_1_adc_R_CFG2_E_MUXSEL MUXSEL;
    bool has_ADACKEN;
    bool ADACKEN;
    bool has_ADHSC;
    bool ADHSC;
    bool has_ADLSTS;
    teensy__3_1_adc_R_CFG2_E_ADLSTS ADLSTS;
} teensy__3_1_adc_R_CFG2;

typedef struct _teensy__3_1_adc_R_PGA {
    bool has_PGAEN;
    bool PGAEN;
    bool has_PGALPB;
    bool PGALPB;
    bool has_PGAG;
    teensy__3_1_adc_R_PGA_E_PGAG PGAG;
} teensy__3_1_adc_R_PGA;

typedef struct _teensy__3_1_adc_R_SC1 {
    bool has_COCO;
    bool COCO;
    bool has_AIEN;
    bool AIEN;
    bool has_DIFF;
    bool DIFF;
    bool has_ADCH;
    uint32_t ADCH;
} teensy__3_1_adc_R_SC1;

typedef struct _teensy__3_1_adc_R_SC2 {
    bool has_ADACT;
    bool ADACT;
    bool has_ADTRG;
    teensy__3_1_adc_R_SC2_E_ADTRG ADTRG;
    bool has_ACFE;
    bool ACFE;
    bool has_ACFGT;
    bool ACFGT;
    bool has_ACREN;
    bool ACREN;
    bool has_DMAEN;
    bool DMAEN;
    bool has_REFSEL;
    teensy__3_1_adc_R_SC2_E_REFSEL REFSEL;
} teensy__3_1_adc_R_SC2;

typedef struct _teensy__3_1_adc_R_SC3 {
    bool has_CAL;
    bool CAL;
    bool has_CALF;
    bool CALF;
    bool has_ADCO;
    bool ADCO;
    bool has_AVGE;
    bool AVGE;
    bool has_AVGS;
    teensy__3_1_adc_R_SC3_E_AVGS AVGS;
} teensy__3_1_adc_R_SC3;

typedef struct _teensy__3_1_adc_Registers {
    bool has_SC1A;
    teensy__3_1_adc_R_SC1 SC1A;
    bool has_SC1B;
    teensy__3_1_adc_R_SC1 SC1B;
    bool has_CFG1;
    teensy__3_1_adc_R_CFG1 CFG1;
    bool has_CFG2;
    teensy__3_1_adc_R_CFG2 CFG2;
    bool has_RA;
    uint32_t RA;
    bool has_RB;
    uint32_t RB;
    bool has_CV1;
    uint32_t CV1;
    bool has_CV2;
    uint32_t CV2;
    bool has_SC2;
    teensy__3_1_adc_R_SC2 SC2;
    bool has_SC3;
    teensy__3_1_adc_R_SC3 SC3;
    bool has_OFS;
    int32_t OFS;
    bool has_PG;
    uint32_t PG;
    bool has_MG;
    uint32_t MG;
    bool has_CLPD;
    uint32_t CLPD;
    bool has_CLPS;
    uint32_t CLPS;
    bool has_CLP4;
    uint32_t CLP4;
    bool has_CLP3;
    uint32_t CLP3;
    bool has_CLP2;
    uint32_t CLP2;
    bool has_CLP1;
    uint32_t CLP1;
    bool has_CLP0;
    uint32_t CLP0;
    bool has_PGA;
    teensy__3_1_adc_R_PGA PGA;
    bool has_CLMD;
    uint32_t CLMD;
    bool has_CLMS;
    uint32_t CLMS;
    bool has_CLM4;
    uint32_t CLM4;
    bool has_CLM3;
    uint32_t CLM3;
    bool has_CLM2;
    uint32_t CLM2;
    bool has_CLM1;
    uint32_t CLM1;
    bool has_CLM0;
    uint32_t CLM0;
} teensy__3_1_adc_Registers;

/* Default values for struct fields */

/* Initializer values for message structs */
#define teensy__3_1_adc_R_SC1_init_default       {false, 0, false, 0, false, 0, false, 0}
#define teensy__3_1_adc_R_CFG1_init_default      {false, 0, false, (teensy__3_1_adc_R_CFG1_E_ADIV)0, false, (teensy__3_1_adc_R_CFG1_E_ADLSMP)0, false, (teensy__3_1_adc_R_CFG1_E_MODE)0, false, (teensy__3_1_adc_R_CFG1_E_ADICLK)0}
#define teensy__3_1_adc_R_CFG2_init_default      {false, (teensy__3_1_adc_R_CFG2_E_MUXSEL)0, false, 0, false, 0, false, (teensy__3_1_adc_R_CFG2_E_ADLSTS)0}
#define teensy__3_1_adc_R_SC2_init_default       {false, 0, false, (teensy__3_1_adc_R_SC2_E_ADTRG)0, false, 0, false, 0, false, 0, false, 0, false, (teensy__3_1_adc_R_SC2_E_REFSEL)0}
#define teensy__3_1_adc_R_SC3_init_default       {false, 0, false, 0, false, 0, false, 0, false, (teensy__3_1_adc_R_SC3_E_AVGS)0}
#define teensy__3_1_adc_R_PGA_init_default       {false, 0, false, 0, false, (teensy__3_1_adc_R_PGA_E_PGAG)0}
#define teensy__3_1_adc_Registers_init_default   {false, teensy__3_1_adc_R_SC1_init_default, false, teensy__3_1_adc_R_SC1_init_default, false, teensy__3_1_adc_R_CFG1_init_default, false, teensy__3_1_adc_R_CFG2_init_default, false, 0, false, 0, false, 0, false, 0, false, teensy__3_1_adc_R_SC2_init_default, false, teensy__3_1_adc_R_SC3_init_default, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, teensy__3_1_adc_R_PGA_init_default, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0}
#define teensy__3_1_adc_R_SC1_init_zero          {false, 0, false, 0, false, 0, false, 0}
#define teensy__3_1_adc_R_CFG1_init_zero         {false, 0, false, (teensy__3_1_adc_R_CFG1_E_ADIV)0, false, (teensy__3_1_adc_R_CFG1_E_ADLSMP)0, false, (teensy__3_1_adc_R_CFG1_E_MODE)0, false, (teensy__3_1_adc_R_CFG1_E_ADICLK)0}
#define teensy__3_1_adc_R_CFG2_init_zero         {false, (teensy__3_1_adc_R_CFG2_E_MUXSEL)0, false, 0, false, 0, false, (teensy__3_1_adc_R_CFG2_E_ADLSTS)0}
#define teensy__3_1_adc_R_SC2_init_zero          {false, 0, false, (teensy__3_1_adc_R_SC2_E_ADTRG)0, false, 0, false, 0, false, 0, false, 0, false, (teensy__3_1_adc_R_SC2_E_REFSEL)0}
#define teensy__3_1_adc_R_SC3_init_zero          {false, 0, false, 0, false, 0, false, 0, false, (teensy__3_1_adc_R_SC3_E_AVGS)0}
#define teensy__3_1_adc_R_PGA_init_zero          {false, 0, false, 0, false, (teensy__3_1_adc_R_PGA_E_PGAG)0}
#define teensy__3_1_adc_Registers_init_zero      {false, teensy__3_1_adc_R_SC1_init_zero, false, teensy__3_1_adc_R_SC1_init_zero, false, teensy__3_1_adc_R_CFG1_init_zero, false, teensy__3_1_adc_R_CFG2_init_zero, false, 0, false, 0, false, 0, false, 0, false, teensy__3_1_adc_R_SC2_init_zero, false, teensy__3_1_adc_R_SC3_init_zero, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, teensy__3_1_adc_R_PGA_init_zero, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0, false, 0}

/* Field tags (for use in manual encoding/decoding) */
#define teensy__3_1_adc_R_CFG1_ADLPC_tag         1
#define teensy__3_1_adc_R_CFG1_ADIV_tag          2
#define teensy__3_1_adc_R_CFG1_ADLSMP_tag        3
#define teensy__3_1_adc_R_CFG1_MODE_tag          4
#define teensy__3_1_adc_R_CFG1_ADICLK_tag        5
#define teensy__3_1_adc_R_CFG2_MUXSEL_tag        1
#define teensy__3_1_adc_R_CFG2_ADACKEN_tag       2
#define teensy__3_1_adc_R_CFG2_ADHSC_tag         3
#define teensy__3_1_adc_R_CFG2_ADLSTS_tag        4
#define teensy__3_1_adc_R_PGA_PGAEN_tag          1
#define teensy__3_1_adc_R_PGA_PGALPB_tag         2
#define teensy__3_1_adc_R_PGA_PGAG_tag           3
#define teensy__3_1_adc_R_SC1_COCO_tag           1
#define teensy__3_1_adc_R_SC1_AIEN_tag           2
#define teensy__3_1_adc_R_SC1_DIFF_tag           3
#define teensy__3_1_adc_R_SC1_ADCH_tag           4
#define teensy__3_1_adc_R_SC2_ADACT_tag          1
#define teensy__3_1_adc_R_SC2_ADTRG_tag          2
#define teensy__3_1_adc_R_SC2_ACFE_tag           3
#define teensy__3_1_adc_R_SC2_ACFGT_tag          4
#define teensy__3_1_adc_R_SC2_ACREN_tag          5
#define teensy__3_1_adc_R_SC2_DMAEN_tag          6
#define teensy__3_1_adc_R_SC2_REFSEL_tag         7
#define teensy__3_1_adc_R_SC3_CAL_tag            1
#define teensy__3_1_adc_R_SC3_CALF_tag           2
#define teensy__3_1_adc_R_SC3_ADCO_tag           3
#define teensy__3_1_adc_R_SC3_AVGE_tag           4
#define teensy__3_1_adc_R_SC3_AVGS_tag           5
#define teensy__3_1_adc_Registers_SC1A_tag       1
#define teensy__3_1_adc_Registers_SC1B_tag       2
#define teensy__3_1_adc_Registers_CFG1_tag       3
#define teensy__3_1_adc_Registers_CFG2_tag       4
#define teensy__3_1_adc_Registers_RA_tag         5
#define teensy__3_1_adc_Registers_RB_tag         6
#define teensy__3_1_adc_Registers_CV1_tag        7
#define teensy__3_1_adc_Registers_CV2_tag        8
#define teensy__3_1_adc_Registers_SC2_tag        9
#define teensy__3_1_adc_Registers_SC3_tag        10
#define teensy__3_1_adc_Registers_OFS_tag        11
#define teensy__3_1_adc_Registers_PG_tag         12
#define teensy__3_1_adc_Registers_MG_tag         13
#define teensy__3_1_adc_Registers_CLPD_tag       14
#define teensy__3_1_adc_Registers_CLPS_tag       15
#define teensy__3_1_adc_Registers_CLP4_tag       16
#define teensy__3_1_adc_Registers_CLP3_tag       17
#define teensy__3_1_adc_Registers_CLP2_tag       18
#define teensy__3_1_adc_Registers_CLP1_tag       19
#define teensy__3_1_adc_Registers_CLP0_tag       20
#define teensy__3_1_adc_Registers_PGA_tag        21
#define teensy__3_1_adc_Registers_CLMD_tag       22
#define teensy__3_1_adc_Registers_CLMS_tag       23
#define teensy__3_1_adc_Registers_CLM4_tag       24
#define teensy__3_1_adc_Registers_CLM3_tag       25
#define teensy__3_1_adc_Registers_CLM2_tag       26
#define teensy__3_1_adc_Registers_CLM1_tag       27
#define teensy__3_1_adc_Registers_CLM0_tag       28

/* Struct field encoding specification for nanopb */
extern const pb_field_t teensy__3_1_adc_R_SC1_fields[5];
extern const pb_field_t teensy__3_1_adc_R_CFG1_fields[6];
extern const pb_field_t teensy__3_1_adc_R_CFG2_fields[5];
extern const pb_field_t teensy__3_1_adc_R_SC2_fields[8];
extern const pb_field_t teensy__3_1_adc_R_SC3_fields[6];
extern const pb_field_t teensy__3_1_adc_R_PGA_fields[4];
extern const pb_field_t teensy__3_1_adc_Registers_fields[29];

/* Maximum encoded size of messages (where known) */
#define teensy__3_1_adc_R_SC1_size               12
#define teensy__3_1_adc_R_CFG1_size              26
#define teensy__3_1_adc_R_CFG2_size              16
#define teensy__3_1_adc_R_SC2_size               22
#define teensy__3_1_adc_R_SC3_size               14
#define teensy__3_1_adc_R_PGA_size               10
#define teensy__3_1_adc_Registers_size           263

#ifdef __cplusplus
} /* extern "C" */
#endif

#endif
