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        "description": "registerMap\n-----------\n\n|pipeline| |coverage| |documentation|\n\n.. |pipeline| image:: https://gitlab.com/registerMap/registerMap/badges/master/pipeline.svg\n   :target: https://gitlab.com/registerMap/registerMap/commits/master\n   :alt: pipeline status\n\n.. |coverage| image:: https://gitlab.com/registerMap/registerMap/badges/master/coverage.svg\n   :target: https://gitlab.com/registerMap/registerMap/commits/master\n   :alt: coverage report\n\n.. |documentation| image:: https://readthedocs.org/projects/registermap/badge/?version=latest\n   :target: http://registermap.readthedocs.io/en/latest/?badge=latest\n   :alt: Documentation Status\n\n|pypiVersion|\n\n|doi0.4.0| (v0.4.0)\n\n.. |pypiVersion| image:: https://badge.fury.io/py/registerMap.svg\n   :target: https://badge.fury.io/py/registerMap\n   :alt: PyPI version\n\n\nA Python 3 framework for creating and maintaining register maps for integrated circuit design and embedded\nsoftware development.\n\n.. contents::\n\n.. section-numbering::\n\n\nMain Features\n=============\n\n* define a register map by the *relationships* and *order* of modules, registers and fields\n* generate address of registers and modules automatically from relationships\n* constrain registers and modules by size or address\n* automatically manage registers that span multiple memory units\n* arbitrary number of memory unit bits (but constant across the register map)\n* arbitrary number of address bits (but constant across the register map)\n* automatically avoid allocating register/module addresses to page registers\n\n\nInstallation\n============\n\nThe simplest way to acquire ``registerMap`` is using ``pip``.\n\n.. code-block:: bash\n\n   pip install registerMap\n\n\nDocumentation\n=============\n\nHead over to readthedocs_\n\n.. _readthedocs: http://registermap.readthedocs.io/\n\n\nDOI Archive\n===========\n\n+-------+------------+\n| 0.1.0 | |doi0.1.0| |\n+-------+------------+\n| 0.2.0 | |doi0.2.0| |\n+-------+------------+\n| 0.3.0 | |doi0.3.0| |\n+-------+------------+\n| 0.4.0 | |doi0.4.0| |\n+-------+------------+\n\n.. |doi0.1.0| image:: https://zenodo.org/badge/DOI/10.5281/zenodo.322502.svg\n   :target: https://doi.org/10.5281/zenodo.322502\n   :alt: DOI 0.1.0\n\n.. |doi0.2.0| image:: https://zenodo.org/badge/DOI/10.5281/zenodo.1098625.svg\n   :target: https://doi.org/10.5281/zenodo.1098625\n   :alt: DOI 0.2.0\n\n.. |doi0.3.0| image:: https://zenodo.org/badge/DOI/10.5281/zenodo.1289354.svg\n   :target: https://doi.org/10.5281/zenodo.1289354\n   :alt: DOI 0.3.0\n\n.. |doi0.4.0| image:: https://zenodo.org/badge/DOI/10.5281/zenodo.1289364.svg\n   :target: https://doi.org/10.5281/zenodo.1289364\n   :alt: DOI 0.4.0\n",
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