{
    "info": {
        "author": "Demetrio Rey",
        "author_email": "demetrio.rey@gmail.com",
        "bugtrack_url": null,
        "classifiers": [
            "Development Status :: 3 - Alpha",
            "Intended Audience :: End Users/Desktop",
            "License :: OSI Approved :: MIT License",
            "Programming Language :: Python :: 2",
            "Programming Language :: Python :: 2.7",
            "Programming Language :: Python :: 3",
            "Programming Language :: Python :: 3.6",
            "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)"
        ],
        "description": "LogicMin: Logic Minimization in Python\n======================================\n\nMinimize logic functions.\n\n\nDescription\n-----------\n\nLogicMin is a Python package that minimize boolean functions using the tabular method of minimization (Quine-McCluskey). An object represent a truth table to which rows are added. After all rows are added, call a solve function.The solve function returns the minimized Sum of Products. The sum of products can be printed or analyzed. \n\nFor more information, look into references:\n\n\t- Edward J. McCluskey. 1986. Logic Design Principles with Emphasis on Testable Semicustom Circuits. Prentice-Hall, Inc., Upper Saddle River, NJ, USA. \n\t- John F. Wakerly. 1989. Digital Design Principles and Practices. Prentice-Hall, Inc., Upper Saddle River, NJ, USA.\n\n\nFull-adder\n----------\n\n.. code:: python \n\n\t# Full-adder\n\timport logicmin\n\t# truth table 3 inputs, 2 outputs\n\tt = logicmin.TT(3,2);\n\t# add rows to the truth table (input, ouutput)\n\t# ci a b  |  s co\n\tt.add(\"000\",\"00\")\n\tt.add(\"001\",\"10\")\n\tt.add(\"010\",\"10\")\n\tt.add(\"011\",\"01\")\n\tt.add(\"100\",\"10\")\n\tt.add(\"101\",\"01\")\n\tt.add(\"110\",\"01\")\n\tt.add(\"111\",\"11\")\n\t# minimize functions and get\n\t# solution for analysis and print\n\tsols = t.solve()\n\t# print solution mapped to var names (xnames=inputs, ynames=outputs)\n\t# add debug information\n\tprint(sols.printN(xnames=['Ci','a','b'],ynames=['s','Co'], info=True))\n\n\n\nOutput:\n\n.. code:: \n\n\tCo <= a.b + Ci.b + Ci.a\n\ts <= Ci'.a'.b + Ci'.a.b' + Ci.a'.b' + Ci.a.b\n\n\n\nGet expression in VHDL syntax:\n\n.. code:: python\n\n\tprint(sols.printN(xnames=['Ci','a','b',ynames=['s','Co'], syntax='VHDL'))\n\nOutput: \n\n.. code:: \n\n\tCo <= a and b or Ci and b or Ci and a\n\ts <=  not(Ci) and  not(a) and b or  not(Ci) and a and  not(b) or Ci and  not(a) and  not(b) or Ci and a and b\n\nBCD to 7 segment converter\n--------------------------\n\n.. code:: python\n\n\t# BCD-8421 to 7 segment\n\timport logicmin\n\tt = logicmin.TT(4,7);\n\t# b3 b2 b1 b0  | a b c d e f g \n\tt.add(\"0000\",\"1111110\") \n\tt.add(\"0001\",\"0110000\") \n\tt.add(\"0010\",\"1101101\") \n\tt.add(\"0011\",\"1111001\") \n\tt.add(\"0100\",\"0110011\") \n\tt.add(\"0101\",\"1011011\") \n\tt.add(\"0110\",\"0011111\") \n\tt.add(\"0111\",\"1110000\") \n\tt.add(\"1000\",\"1111111\") \n\tt.add(\"1001\",\"1110011\") \n\tt.add(\"1010\",\"-------\") \n\tt.add(\"1011\",\"-------\") \n\tt.add(\"1100\",\"-------\") \n\tt.add(\"1101\",\"-------\") \n\tt.add(\"1110\",\"-------\") \n\tt.add(\"1111\",\"-------\") \n\t# Outputs minimized independently\n\tsols = t.solve()\n\tprint(sols.printN( xnames=['b3','b2','b1','b0'], ynames=['a','b','c','d','e','f','g']))\n\n\nOutput:\n\n\n.. code:: \n\n\tg <= b2'.b1 + b2.b1' + b2.b0' + b3\n\tf <= b1'.b0' + b2.b1' + b2.b0' + b3\n\te <= b2'.b0' + b1.b0'\n\td <= b2.b1'.b0 + b2'.b0' + b2'.b1 + b1.b0'\n\tc <= b1' + b0 + b2\n\tb <= b1'.b0' + b1.b0 + b2'\n\ta <= b2'.b0' + b1.b0 + b2.b0 + b3\n\n\nFinite-state machines\n---------------------\n\nFor finite-state machines, use the FSM object. \n\nBinary counter with hold\n------------------------\n\n.. code:: python\n\n\t# Finite-state machine\n\t# x=0 => hold\n\t# x=1 => binary up count\n\t# y = 1 in states: e1 and e3\n\timport logicmin\n\t# state labels\n\tstates = ['e0','e1','e2','e3']\n\t# 2 bits for state codes\n\t# 1 input variable\n\t# 1 output variable\n\tm = logicmin.FSM(states,2,1,1)\n\t# transition table\n\tm.add('0','e0','e0','0')\n\tm.add('1','e0','e1','0')\n\tm.add('0','e1','e1','1')\n\tm.add('1','e1','e2','1')\n\tm.add('0','e2','e2','0')\n\tm.add('1','e2','e3','0')\n\tm.add('0','e3','e3','1')\n\tm.add('1','e3','e0','1')\n\t# asign code to states\n\tcodes = {'e0':0,'e1':1,'e2':2,'e3':3}\n\tm.assignCodes(codes)\n\t# solve with D flip-flops\n\tsols = m.solveD()\n\t# print solution with input and output names\n\tprint(sols.printN(xnames=['X','Q1','Q0'], ynames=['D1','D0','Y']))\n\nOutput:\n\n.. code:: \n\n\tY <= Q0\n\tD0 <= X'.Q0 + X.Q0'\n\tD1 <= X.Q1'.Q0 + X'.Q1 + Q1.Q0'\n\nThe advantages of FSM objects are \n\n\t1. Names for the states \n\t2. Decouple state code assignment from table initialization.\n\nOther examples\n--------------\n\nLook into examples directory.\n\nInstall\n-------\n\n.. code:: \n\n \tpip install logicmin",
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