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    "info": {
        "author": "Jon Dawson",
        "author_email": "chips@jondawson.org.uk",
        "bugtrack_url": null,
        "classifiers": [
            "Development Status :: 3 - Alpha",
            "Intended Audience :: Developers",
            "Intended Audience :: Science/Research",
            "License :: OSI Approved :: MIT License",
            "Operating System :: OS Independent",
            "Programming Language :: Python",
            "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
            "Topic :: Software Development :: Code Generators",
            "Topic :: Software Development :: Embedded Systems"
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        "description": ".. image:: https://travis-ci.org/dawsonjon/Chips-2.0.svg?branch=master\n    :target: https://travis-ci.org/dawsonjon/Chips-2.0`\n\nChips - 2.0\n===========\n\n*Chips* is a high level, FPGA design tool inspired by *Python*.\n\nTry it out\n----------\n\nWhy not try the `Chips <http://dawsonjon.pythonanywhere.com>`_ web app. \n\nDesign components in C, design FPGAs in Python\n----------------------------------------------\n\nIn Chips, a design resembles a network of computers implemented in a single\nchip. A chip consists of many interconnected components operating in parallel.\nEach component acts like a computer running a C program. \n\nComponents communicate with each other sending messages across buses. The\ndesign of a chip - the components and the connections between them - is carried\nin Python. \n\nChips come in three parts:\n\n1. A Python library to build and simulate chips by connecting together digital components using high speed buses.\n\n2. A collection of ready made digital components.\n\n3. A C-to-hardware compiler to make new digital components in the C programming language.\n\nA quick example\n---------------\n\n::\n\n        from chips.api.api import *\n        \n        #create a new chip\n        chip = Chip(\"knight_rider\")\n\n        #define a component in C\n        scanner = Component(C_file = \"\"\"\n\n            /* Knight Rider */\n            int leds = output(\"leds\");\n            void main(){\n                unsigned shifter = 1;\n                while(1){\n                    while(shifter != 0x80){\n                        fputc(shifter, leds);\n                        shifter <<= 1;\n                        wait_clocks(5000000);\n                    }\n                    while(shifter != 0x01){\n                        fputc(shifter, leds);\n                        shifter >>= 1;\n                        wait_clocks(5000000);\n                    }\n                }\n            }\n\n        \"\"\", inline=True)\n\n        #capture simulation output in Python\n        scanner_output = Response(chip, \"scanner\", \"int\")\n        \n        #add scanner to chip and connect\n        scanner(chip, inputs = {}, outputs = {\"leds\":scanner_output})\n\n        #generate synthesisable verilog code\n        chip.generate_verilog()\n\n        #run simulation in Python\n        chip.simulation_reset()\n        while len(scanner_output) < 16:\n            chip.simulation_step()\n\n        #check the results\n        print list(scanner_output)\n\n..        \n\n\nWork at a higher level of abstraction \n-------------------------------------\n\nIn Chips, the details of gates, clocks, resets, finite-state machines and\nflow-control are handled by the tool, this leaves the designer free to think\nabout the architecture and the algorithms. This has some benefits:\n\n+ Designs are simpler.\n+ Simpler designs take much less time to get working.\n+ Simpler designs are much less likely to have bugs.\n\nWith Chips the batteries *are* included \n---------------------------------------\n\nWith traditional Hardware Description Languages, there are many restrictions on\nwhat can be translated into hardware and implemented in a chip.\n\nWith Chips almost all legal code can be translated into hardware. This includes\ndivision, single and double precision IEEE floating point, maths functions,\ntrig-functions, timed waits, pseudo-random numbers and recursive function\ncalls.\n\nPython is a rich verification environment\n-----------------------------------------\n\nChips provides the ability to simulate designs natively in Python.  Python is\nan excellent programming language with extensive libraries covering many\napplication domains. This makes it the perfect environment to verify a chip.\n\n`NumPy <http://www.numpy.org/>`_ , `SciPy <http://scipy.org/>`_  and\n`MatPlotLib <http://http://matplotlib.org/>`_  will be of interest to\nengineers, but that's just the `start <https://pypi.python.org/pypi>`_ .\n\nUnder the hood\n--------------\n\nBehind the scenes, Chips uses some novel techniques to generate compact and\nefficient logic - a hybrid of software and hardware. \n\nNot only does the compiler translate the C code into CPU instructions, it also\ngenerates a customised pipelined RISC CPU on the fly. The CPU provides the\noptimal instruction set for any particular C program.\n\nBy minimising the logic required to perform each concurrent task, designers can\nreduce power and area or cost. Performance gains can be achieved by increasing\nthe number of concurrent tasks in a single device (tens in a small device to\naround a thousand or more large device).\n\nWhile the code generated by chips is compact and efficient, die hard FPGA\ndesigners will be pleased to know that they can still hand craft performance\ncritical data paths if they need to. There are even a few hand crafted\ncomponents thrown in!\n\nInstall from github\n-------------------\n\n::\n\n        $ git clone --recursive https://github.com/dawsonjon/Chips-2.0.git\n        $ cd Chips-2.0\n        $ sudo python setup install\n\nInstall from PyPi\n-----------------\n\n::\n\n        $ pip-install chips",
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